Asm
/* $Id$ */
/* Copyright (c) 2011-2018 Pierre Pronchery <khorben@defora.org> */
/* This file is part of DeforaOS Devel Asm */
/* This program is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, version 3 of the License.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with this program. If not, see <http://www.gnu.org/licenses/>. */
/* helpers */
/* opcodes */
#define OP1F (8 << AOD_SIZE)
#define OP2F (16 << AOD_SIZE)
/* operands */
/* registers */
#define AOF_DALVIK_REGSIZE 0x2
#define OP_REG4 AO_REGISTER(AOF_DALVIK_REGSIZE, 32, 4)
#define OP_REG8 AO_REGISTER(AOF_DALVIK_REGSIZE, 32, 8)
#define OP_REG16 AO_REGISTER(AOF_DALVIK_REGSIZE, 32, 16)
/* immediate values */
#define OP_U4 AO_IMMEDIATE(0, 4, 0)
#define OP_U8 AO_IMMEDIATE(0, 8, 0)
#define OP_U16 AO_IMMEDIATE(0, 16, 0)
#define OP_U16_STR AO_IMMEDIATE(0, 16, AOI_REFERS_STRING)
#define OP_U16_FUNC AO_IMMEDIATE(0, 16, AOI_REFERS_FUNCTION)
#define OP_U32 AO_IMMEDIATE(0, 32, 0)
#define OP_U64 AO_IMMEDIATE(0, 64, 0)
{ "add-double", 0xab, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "add-double/2addr", 0xcb, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "add-float", 0xa6, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "add-float/2addr", 0xc6, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "add-int", 0x90, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "add-int/2addr", 0xb0, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "add-int/lit8", 0xd8, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "add-int/lit16", 0xd0, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "add-long", 0x9b, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "add-long/2addr", 0xbb, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "aget", 0x44, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aget-boolean", 0x47, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aget-byte", 0x48, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aget-char", 0x49, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aget-object", 0x46, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aget-short", 0x4a, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aget-wide", 0x45, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "and-int", 0x95, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "and-int/2addr", 0xb5, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "and-int/lit8", 0xdd, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "and-int/lit16", 0xd5, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "and-long", 0xa0, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "and-long/2addr", 0xc0, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "aput", 0x4b, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aput-boolean", 0x4e, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aput-byte", 0x4f, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aput-char", 0x50, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aput-object", 0x4d, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aput-short", 0x51, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "aput-wide", 0x4c, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "array-length", 0x21, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "check-cast", 0x1f, OP1F, AO_2(OP_REG8, OP_U16) },
{ "cmp-long", 0x31, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "cmpg-double", 0x30, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "cmpg-float", 0x2e, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "cmpl-double", 0x2f, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "cmpl-float", 0x2d, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "const", 0x14, OP1F, AO_2(OP_REG8, OP_U32) },
{ "const/4", 0x12, OP1F, AO_2(OP_REG4, OP_U4) },
{ "const/16", 0x13, OP1F, AO_2(OP_REG8, OP_U16) },
{ "const/high16", 0x15, OP1F, AO_2(OP_REG8, OP_U16) },
{ "const-class", 0x1c, OP1F, AO_2(OP_REG8, OP_U16) },
{ "const-string", 0x1a, OP1F, AO_2(OP_REG8, OP_U16_STR) },
{ "const-wide", 0x18, OP1F, AO_2(OP_REG8, OP_U64) },
{ "const-wide/16", 0x16, OP1F, AO_2(OP_REG8, OP_U16) },
{ "const-wide/32", 0x17, OP1F, AO_2(OP_REG8, OP_U32) },
{ "div-double", 0xae, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "div-double/2addr", 0xce, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "div-float", 0xa9, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "div-float/2addr", 0xc9, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "div-int", 0x93, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "div-int/2addr", 0xb3, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "div-int/lit8", 0xdb, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "div-int/lit16", 0xd3, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "div-long", 0x9e, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "div-long/2addr", 0xbe, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "double-to-float", 0x8c, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "double-to-int", 0x8a, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "double-to-long", 0x8b, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "execute-inline", 0xee, OP1F, AO_3(OP_U8, OP_U16, OP_U16) },
{ "fill-array-data", 0x26, OP1F, AO_2(OP_REG8, OP_U32) },
{ "filled-new-array", 0x24, OP1F, AO_2(OP_REG8, OP_U32) },
{ "filled-new-array-range",
0x25, OP1F, AO_2(OP_REG8, OP_U32) },
{ "float-to-double", 0x89, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "float-to-int", 0x8a, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "float-to-long", 0x88, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "goto", 0x28, OP1F, AO_1(OP_U8) },
{ "goto/16", 0x2900, OP2F, AO_1(OP_U16) },
{ "if-eq", 0x32, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "if-eqz", 0x38, OP1F, AO_2(OP_REG8, OP_U16) },
{ "if-ge", 0x35, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "if-gez", 0x3b, OP1F, AO_2(OP_REG8, OP_U16) },
{ "if-gt", 0x36, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "if-gtz", 0x3c, OP1F, AO_2(OP_REG8, OP_U16) },
{ "if-le", 0x37, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "if-lez", 0x3d, OP1F, AO_2(OP_REG8, OP_U16) },
{ "if-lt", 0x34, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "if-ltz", 0x3a, OP1F, AO_2(OP_REG8, OP_U16) },
{ "if-ne", 0x33, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "if-nez", 0x39, OP1F, AO_2(OP_REG8, OP_U16) },
{ "iget", 0x52, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iget-boolean", 0x55, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iget-byte", 0x56, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iget-char", 0x57, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iget-object", 0x54, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iget-short", 0x58, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iget-wide", 0x53, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "int-to-byte", 0x8d, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "int-to-char", 0x8e, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "int-to-float", 0x82, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "int-to-long", 0x81, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "int-to-short", 0x8f, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "invoke-direct", 0x70, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-direct-empty",0xf0, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-direct/range",0x76, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-interface", 0x72, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-interface-range",
0x78, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-static", 0x71, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-static/range",0x77, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-super", 0x6f, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-super/range", 0x75, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-virtual", 0x6e, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "invoke-virtual/range",
0x74, OP1F, AO_3(OP_U8, OP_U16_FUNC, OP_U16) },
{ "iput", 0x59, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iput-boolean", 0x5c, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iput-byte", 0x5d, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iput-char", 0x5e, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iput-object", 0x5b, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iput-short", 0x5f, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "iput-wide", 0x5a, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "long-to-double", 0x86, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "long-to-float", 0x85, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "long-to-int", 0x84, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "monitor-enter", 0x1d, OP1F, AO_1(OP_REG8) },
{ "monitor-exit", 0x1e, OP1F, AO_1(OP_REG8) },
{ "move", 0x01, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "move/16", 0x03, OP1F, AO_2(OP_REG16, OP_REG8) },
{ "move/from16", 0x02, OP1F, AO_2(OP_REG8, OP_REG16) },
{ "move-exception", 0x0d, OP1F, AO_1(OP_REG8) },
{ "move-object", 0x07, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "move-object/16", 0x09, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "move-object/from16", 0x08, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "move-result", 0x0a, OP1F, AO_1(OP_REG8) },
{ "move-result-object", 0x0c, OP1F, AO_1(OP_REG8) },
{ "move-result-wide", 0x0b, OP1F, AO_1(OP_REG8) },
{ "move-wide", 0x04, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "move-wide/16", 0x06, OP1F, AO_2(OP_REG8, OP_REG16) },
{ "move-wide/from16", 0x05, OP1F, AO_2(OP_REG8, OP_REG16) },
{ "mul-double", 0xad, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "mul-double/2addr", 0xcd, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "mul-float", 0xa8, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "mul-float/2addr", 0xc8, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "mul-int", 0x92, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "mul-int/2addr", 0xb2, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "mul-int/lit8", 0xda, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "mul-int/lit16", 0xd2, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "mul-long", 0x9d, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "mul-long/2addr", 0xbd, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "neg-double", 0x80, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "neg-float", 0x7f, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "neg-int", 0x7b, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "neg-long", 0x7d, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "new-array", 0x23, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "new-instance", 0x22, OP1F, AO_2(OP_REG8, OP_U16) },
{ "nop", 0x0000, OP2F, AO_0() },
#if 1 /* XXX really implement */
{ "not-int", 0x7c, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "not-long", 0x7e, OP1F, AO_2(OP_REG4, OP_REG4) },
#endif
{ "or-int", 0x96, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "or-int/2addr", 0xb6, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "or-int/lit8", 0xdb, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "or-int/lit16", 0xd6, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "or-long", 0xa1, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "or-long/2addr", 0xc1, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "rem-double", 0xaf, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "rem-double/2addr", 0xcf, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "rem-float", 0xaa, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "rem-float/2addr", 0xca, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "rem-int", 0x94, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "rem-int/2addr", 0xb4, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "rem-int/lit8", 0xdc, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "rem-int/lit16", 0xd4, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "rem-long", 0x9f, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "rem-long/2addr", 0xbf, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "return", 0x0f, OP1F, AO_1(OP_REG8) },
{ "return-object", 0x11, OP1F, AO_1(OP_REG8) },
{ "return-void", 0x0e00, OP2F, AO_0() },
{ "return-wide", 0x10, OP1F, AO_1(OP_REG8) },
{ "sget", 0x60, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sget-boolean", 0x63, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sget-byte", 0x64, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sget-char", 0x65, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sget-object", 0x62, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sget-short", 0x66, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sget-wide", 0x61, OP1F, AO_2(OP_REG8, OP_U16) },
{ "shl-int", 0x98, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "shl-int/2addr", 0xb8, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "shl-int/lit8", 0xe0, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "shl-long", 0xa3, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "shl-long/2addr", 0xc3, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "shr-int", 0x99, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "shr-int/2addr", 0xb9, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "shr-int/lit8", 0xe1, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "shr-long", 0xa4, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "shr-long/2addr", 0xc4, OP1F, AO_2(OP_REG4, OP_REG4) },
#if 1 /* XXX implement correctly */
{ "sparse-switch", 0x2c, OP1F, AO_2(OP_REG8, OP_U32) },
#endif
{ "sput", 0x67, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sput-boolean", 0x6a, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sput-byte", 0x6b, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sput-char", 0x6c, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sput-object", 0x69, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sput-short", 0x6d, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sput-wide", 0x68, OP1F, AO_2(OP_REG8, OP_U16) },
{ "sub-double", 0xac, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "sub-double/2addr", 0xcc, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "sub-float", 0xa7, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "sub-float/2addr", 0xc7, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "sub-int", 0x91, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "sub-int/2addr", 0xb1, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "sub-int/lit8", 0xd9, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "sub-int/lit16", 0xd1, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "sub-long", 0x9c, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "sub-long/2addr", 0xbc, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "throw", 0x27, OP1F, AO_1(OP_REG8) },
{ "ushr-int", 0x9a, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "ushr-int/2addr", 0xba, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "ushr-int/lit8", 0xe2, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "ushr-long", 0xa5, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "ushr-long/2addr", 0xc5, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "xor-int", 0x97, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "xor-int/2addr", 0xb7, OP1F, AO_2(OP_REG4, OP_REG4) },
{ "xor-int/lit8", 0xdf, OP1F, AO_3(OP_REG8, OP_REG8, OP_U8) },
{ "xor-int/lit16", 0xd7, OP1F, AO_3(OP_REG4, OP_REG4, OP_U16) },
{ "xor-long", 0xa2, OP1F, AO_3(OP_REG8, OP_REG8, OP_REG8) },
{ "xor-long/2addr", 0xc2, OP1F, AO_2(OP_REG4, OP_REG4) },